xCORE is found exclusively on ATTO XstreamCORE® intelligent bridges
Today's demanding data center environments have an added extra layer of complexity. It used be that all admins needed to worry about was available storage capacity but flash storage has made maximizing performance to these devices another priority. With the rapid integration of flash storage system architects have to make sure that the systems they are building are capable of taking advantage of the performance capabilities of SSD flash storage. One of the key measures of how well flash will integrate is storage latency, the amount of time it takes to read or write data from a storage device and deliver it to an application. Latency directly effects throughput and IOPS performance, high latency will lead to applications waiting for data while lower latency will efficiently feed applications so all server resources can be maximized.
XstreamCORE adds an insignificant amount of latency to native flash transactions thanks to xCORE data acceleration technology.
With the advent of vendors using commodity servers to build flash architectures there has been a lack of focus on one of the items that make flash storage so beneficial, low latency. ATTO leveraged highly programmable FPGA technology to develop a platform that minimizes latency added to each read and write. One of the key ways we do this is by separating the data and control planes to keep latency at a consistent, deterministic sub-four microsecond rate. xCORE manages the data plane and assures that all reads and writes are processed as fast as possible. All nondata transactions are handled by ATTO exclusive eCORE Control Engine so priority is maintained for all data transfer traffic.
xCORE technology is currently available exclusively on ATTO XstreamCORE solid-state intelligent bridge which connect stranded SAS storage to shared storage networks. XstreamCORE allows storage architects to build solutions that meet today’s demanding performance requirements while maximizing the amount of performance available in flash storage.
CPU utilization has to be governed when using slower technologies such as HDDs or hardware with high latencies
Higher CPU utilization can be realized when using faster technologies such as flash SSDs along with XstreamCORE intelligent bridges with < four microsecond latency
XstreamCORE adds < four microseconds of latency
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